Selected Publications per subject

Machine Learning
  1. Zhewen Yu, Sudarshan Sreeram, Krish Agrawal, Junyi Wu, Alexander Montgomerie-Corcoran, Cheng Zhang, Jianyi Cheng, Christos-Savvas Bouganis, Yiren Zhao, "HASS: Hardware-Aware Sparsity Search for Dataflow DNN Accelerator", International Conference on Field-Programmable Logic and Applications (FPL), 2024
  2. Petros Toupas, Zhewen Yu, Christos-Savvas Bouganis and Dimitrios Tzovaras, "SMOF: Streaming Modern CNNs on FPGAs with Smart Off-Chip", IEEE International Symposium On Field-Programmable Custom Computing Machines (FCCM), 2024 (pdf)(slides)(code)
  3. Omar Sharif and Christos-Savvas Bouganis, "A Framework for Designing Gaussian Belief Propagation Accelerators for use in SLAM Problems", Design, Automation and Test in Europe Conference (DATE), 2024
  4. Zhewen Yu and Christos-Savvas Bouganis, "AutoWS: Automate Weights Streaming in Layer-wise Pipelined DNN Accelerators", Design, Automation and Test in Europe Conference (DATE), 2024 (pdf) (code)
  5. Alexander Montgomerie-Corcoran, Petros Toupas, Zhewen Yu and Christos-Savvas Bouganis, "SATAY: A Streaming Architecture Toolflow for Accelerating YOLO Models on FPGA Devices", International Conference on Field-Programmable Technology (ICFPT), 2023 (pdf) (code)
  6. Guoxuan Xia and Christos-Savvas Bouganis, "Window-Based Early-Exit Cascades for Uncertainty Estimation: When Deep Ensembles are More Efficient than Single Models", International Conference on Computer Vision (ICCV), 2023 (pdf) (code)
  7. Alexander Montgomerie-Corcoran, Zhewen Yu, Jianyi Cheng and Christos-Savvas Bouganis, "PASS: Exploiting Post-Activation Sparsity in Streaming Architectures for CNN Acceleration", International Conference on Field-Programmable Logic and Applications (FPL), 2023 (pdf)
  8. Zhewen Yu and Christos-Savvas Bouganis, "Mixed-TD: Efficient Neural Network Accelerator with Layer-Specific Tensor Decomposition", International Conference on Field-Programmable Logic and Applications (FPL), 2023 (pdf) (code)
  9. Petros Toupas, Christos-Savvas Bouganis and Dimitrios Tzovaras, "fpgaHART: A toolflow for throughput-oriented acceleration of 3D CNNs for HAR onto FPGAs", International Conference on Field-Programmable Logic and Applications (FPL), 2023 (pdf)
  10. Petros Toupas, Christos-Savvas Bouganis and Dimitrios Tzovaras, "FMM-X3D: FPGA-based modelling and mapping of X3D for Human Action Recognition", IEEE International Conference on Application-specific Systems, Architectures and Processors (ASAP), 2023 (pdf)
  11. Petros Toupas, Alexander Montgomerie-Corcoran, Christos-Savvas Bouganis and Dimitrios Tzovaras, "HARFLOW3D: A Latency-Oriented 3D-CNN Accelerator Toolflow for HAR on FPGA Devices", IEEE International Symposium On Field-Programmable Custom Computing Machines (FCCM), 2023 (pdf) (code) (slides) (ORO & ROR Badges)
  12. Benjamin Biggs, Christos-Savvas Bouganis and George Constantinides, "ATHEENA: A Toolflow for Hardware Early-Exit Network Automation", IEEE International Symposium On Field-Programmable Custom Computing Machines (FCCM), 2023 (pdf) (code)
  13. Guoxuan Xia and Christos-Savvas Bouganis, "Augmenting Softmax Information for Selective Classification with Out-of-Distribution Data", Asian Conference on Computer Vision (ACCV), 2022 (pdf) (poster) (slides)
  14. Guoxuan Xia and Christos-Savvas Bouganis, "On the Usefulness of Deep Ensemble Diversity for Out-of-Distribution Detection", ECCV Workshop on Uncertainty Quantification for Computer Vision (UNCV), 2022 (pdf) (poster) (video) 
  15. Zhewen Yu and Christos-Savvas Bouganis, “SVD-NAS: Coupling Low-Rank Approximation and Neural Architecture Search”, IEEE/CVF Winter Conference on Applications of Computer Vision (WACV), 2023 (pdf)(code)
  16. Alexander Montgomerie-Corcoran, Zhewen Yu and Christos-Savvas Bouganis, "SAMO: Optimised Mapping of Convolutional Neural Networks to Streaming Architectures", International Conference on Field Programmable Logic and Applications (FPL), 2022 (pdf) (code) 
  17. Alexander Montgomerie-Corcoran and Christos-Savvas Bouganis, "POMMEL: Exploring Off-Chip Memory Energy & Power Consumption in Convolutional Neural Network Accelerators", Euromicro Symposium on Digital System Design (DSD), 2021 (pdf) (code) (slides)
  18. Zhewen Yu and Christos-Savvas Bouganis, "StreamSVD: Low-rank Approximation and Streaming Accelerator Co-design", International Conference on Field-Programmable Technology (ICFPT), 2021 (pdf) (code)
  19. Alexander Montgomerie-Corcoran and Christos-Savvas Bouganis, "DEF: Differential Encoding of Featuremaps for Low Power Convolutional Neural Network Accelerators", in Asia and South Pacific Design Automation Conference (ASP-DAC), 2021 (pdf)
  20. Zhewen Yu and Christos-Savvas Bouganis, "A Parameterisable FPGA-Tailored Architecture for YOLOv3-Tiny", International Symposium on Applied Reconfigurable Computing (ARC), 2020 (pdf) (code)
  21. Aditya Rajagopal, Diederik Adriaan Vink, Stylianos I Venieris, Christos-Savvas Bouganis, "Multi-Precision Policy Enforced Training (MuPPET): A precision-switching strategy for quantised fixed-point training of CNNs", International Conference on Machine Learning (ICML), 2020 (pdf) (code)
  22. Diederik Adriaan Vink, Aditya Rajagopal, Stylianos I Venieris, Christos-Savvas Bouganis, "Caffe Barista: Brewing Caffe with FPGAs in the Training Loop", International Conference on Field Programmable Logic and Applications (FPL), 2020 (pdf) (code)
  23. Alexandros Kouris, Stylianos I. Venieris, michalis Rizakis and Christos-Savvas Bouganis, "Approximate LSTMs for Time-Constrained Inference: Enabling Fast Reaction in Self-Driving Cars", IEEE Consumer Electronics Magazine, 2020 (pdf)
  24. Alexandros Kouris, Stylianos I. Venieris and Christos-Savvas Bouganis, "A throughput-latency co-optimised cascade of convolutional neural network classifiers", Design, Automation & Test in Europe Conference & Exhibition (DATE), 2020 (pdf)
  25. Aditya Rajagopal, Christos-Savvas Bouganis, "Now That I Can See, I Can Improve: Enabling Data-Driven Finetuning of CNNs on the Edge", IEEE/CVF Conference on Computer Vision and Pattern Recognition (CVPR) Workshops, 2020 (pdf) (code)
  26. Alexander Montgomerie-Corcoran, Stylianos I Venieris, Christos-Savvas Bouganis, "Power-Aware FPGA Mapping of Convolutional Neural Networks", International Conference on Field-Programmable Technology (ICFPT), 2019 (pdf)
  27. Alexandros Kouris, Christos Kyrkou and Christos-Savvas Bouganis, "Informed Region Selection for Efficient UAV-based Object Detectors: Altitude-aware Vehicle Detection with CyCAR Dataset",  IEEE/RSJ International Conference on Intelligent Robots and Systems (IROS), 2019 (preprint)(video)(dataset)
  28. Alexandros Kouris, Stylianos I. Venieris and Christos-Savvas Bouganis, "Towards Efficient On-Board Deployment of DNNs on Intelligent Autonomous Systems",  IEEE Computer Society Annual Symposium on VLSI (ISVLSI), 2019 (pdf)
  29. Alexandros Kouris and Christos-Savvas Bouganis, "Learning to Fly by MySelf: A Self-Supervised CNN-based Approach for Autonomous Navigation",  IEEE/RSJ International Conference on Intelligent Robots and Systems (IROS), 2018 (pdf) (video)
  30. Stylianos I. Venieris and Christos-Savvas Bouganis, "fpgaConvNet: Mapping Regular and Irregular Convolutional Neural Networks on FPGAs", IEEE Transactions on Neural Networks and Learning Systems, 2018 (pdf)
  31. Stylianos I. Venieris and Christos-Savvas Bouganis, "f-CNNx: A Toolflow for Mapping Multiple Convolutional Neural Networks on FPGAs", 28th International Conference on Field Programmable Logic and Applications (FPL), 2018 (pdf)
  32. Alexandros Kouris, Stylianos I. Venieris and Christos-Savvas Bouganis, "CascadeCNN: Pushing the Performance Limits of Quantisation in Convolutional Neural Networks", 28th International Conference on Field Programmable Logic and Applications (FPL), 2018 (pdf)
  33. Stylianos I. Venieris, Alexandros Kouris and Christos-Savvas Bouganis, "Toolflows for Mapping Convolutional Neural Networks on FPGAs: A Survey and Future Directions", ACM Computing Surveys, 2018 (pdf) 
  34. Alexandros Kouris, Stylianos I. Venieris and Christos-Savvas Bouganis, "CascadeCNN: Pushing the performance limits of quantisation", SysML, 2018 (pdf)
  35. Michalis Rizakis, Stylianos I. Venieris, Alexandros Kouris and Christos-Savvas Bouganis, "Approximate FPGA-based LSTMs under Computation Time Constraints", International Symposium on Applied Reconfigurable Computing (ARC), 2018 [Best Paper Award Nomination] (pdf)
  36. Christos Kyrkou, George Plastiras, Stylianos I. Venieris, Theocharis Theocharides and Christos-Savvas Bouganis, "DroNet: Efficient Convolutional Neural Network Detector for Real-Time UAV Applications", International Conference on Design, Automation and Test in Europe (DATE), 2018 (pdf).
  37. Stylianos I. Venieris and Christos-Savvas Bouganis, "fpgaConvNet: A Toolflow for Mapping Diverse Convolutional Neural Networks on Embedded FPGAs", Workshop on Machine Learning on the Phone and other Consumer Devices (MLPCD), NIPS 2017 (pdf)
  38. Stelios Venieris, Christos Bouganis, “Latency-Driven Design for FPGA-based Convolutional Neural Networks”, FPL 2017 (pdf)
  39. Stelios Venieris, Christos Bouganis, “fpgaConvNet: A Framework for Mapping Convolutional Neural Networks on FPGAs”,Proc. IEEE Symposium on Field-Programmable Custom Computing Machines, pp. 40-47, 2016, (pdf) (slides)
  40. C. Kyrkou, and T. Theocharides, C.-S. Bouganis, and M. Polycarpou, “Embedded Hardware-Efficient Real-Time Classification With Cascade Support Vector Machined”, IEEE Transactions on Neural Networks and Learning Systems, Vol: 27, Issue 1, Jan. 2016 (pdf)  
  41. Mudhar Bin Rabieah, Christos Bouganis, “Fast FPGA System for Training Nonlinear Support Vector Machines”, LearningSys 2015:1-4 (pdf)
  42. Mudhar Bin Rabieah, Christos Bouganis, “FPGA based nonlinear Support Vector Machine training using an ensemble learning”, FPL 2015:1-4 (pdf)
  43. Chuan Cheng, Christos Bouganis, “Memory optimisation for hardware induction of axis-parallel decision tree”, ReConFig 2014:1-7 (pdf)
  44. C. Kyrkou, and T. Theocharides, and C.-S. Bouganis "An Embedded Hardware-Efficient Architecture for Real-Time Cascade Support Vector Machine Classification", IC SAMOS 2013, pp.129-136 (pdf)
  45. C. Cheng and C.-S. Bouganis "Accelerating Random Forest training process using FPGA", FPL 2013, pp.1-4 (pdf)
  46. Christos Kyrkou, C.-S. Bouganis, Theocharis Theocharides, "FPGA-based acceleration of cascaded support vector machines for embedded applications", (abstract only), FPGA 2013, pp. 267
  47. Christos Kyrkou, Theocharis Theocharides, C.-S. Bouganis, "A hardware-efficient architecture for embedded real-time cascaded support vector machines classification", ACM Great Lakes Symposium on VLSI 2013, pp. 341-342 (pdf)
  48. M. Papadonikolakis, C. Bouganis , "Novel Cascade FPGA Accelerator for Support Vector Machines Classification", Neural Networks and Learning Systems, IEEE Transactions on, vol.23(7), pp.1040-1052 (pdf)
  49. M. Papadonikolakis and C.-S. Bouganis, “A Novel FPGA-Based Support Vector Machine Classifier”, FPT 2010 (pdf)
  50. M.Papadonikolakis and C.-S. Bouganis, “A Heterogeneous FPGA Architecture for Support Vector Machine Training”, Proc. IEEE Symposium on Field-Programmable Custom Computing Machines, pp. 211-214, 2010 (pdf).
  51. M.Papadonikolakis, C.Bouganis and G.A.Constantinides, "Performance Comparison of GPU and FPGA Architectures for the SVM Training Problem", Proc. IEEE International Conference on Field-Programmable Technology, pp. 388-391, 2009 (pdf).
  52. M. Papadonikolakis and C.-S. Bouganis, "A Scalable FPGA Architecture for Non-Linear SVM Training", Proc. IEEE International Conference on Field Programmable Technology, pp.337-340, 2008 (pdf).
  53. M. Papadonikolakis and C.-S. Bouganis, "Efficient FPGA Mapping of Gilbert's Algorithm For SVM Training on Large-Scale Classification Problems", Proc. IEEE International Conference on Field Programmable Logic and Applications, pp.385-390, 2008 (pdf).
Computer Vision
  1. Manolis Vasileiadis, Christos-Savvas Bouganis, Dimitrios Tzovaras, "Multi-person 3D pose estimation from 3D cloud data using 3D convolutional neural networks", Computer Vision and Image Understanding 2019 (pdf)
  2. Ioannis Kostavelis, Manolis Vasileiadis, Evangelos Skartados, Andreas Kargakos, Dimitrios Giakoumis, Christos-Savvas Bouganis, Dimitrios Tzovaras, "Understanding of human behavior with a robotic agent through daily activity analysis",  International Journal of Social Robotics (IJSR) 2019 (pdf)
  3. Manolis Vasileiadis, Christos-Savvas Bouganis, Georgios Stavropoulos and Dimitrios Tzovaras, “Optimising 3D-CNN Design Towards Human Pose Estimation on Low Power Devices”, BMVC 2019 (pdf)
  4. Konstantinos Boikos, Christos-Savvas Bouganis, “A Scalable FPGA-based Architecture for Depth Estimation in SLAM”, ARC2019 (preprint)
  5. Konstantinos Boikos, Christos-Savvas Bouganis, “A High-Performance System-on-Chip Architecture for Direct Tracking for SLAM”, FPL 2017 (pdf)
  6. M Vasileiadis, S Malassiotis, D Giakoumis, CS Bouganis, D Tzovaras, "Robust Human Pose Tracking for Realistic Service Robot Applications", ICCV 2017 (pdf)
  7. Konstantinos Boikos, C.-S. Bouganis, “Semi-dense SLAM on an FPGA SoC”, FPL 2016, pp. 1-4 (pdf)
  8. Jianxiong Liu, Christos-Savvas Bouganis, Peter Cheung, “Context-based Image Acquisition From Memory in Digital Systems”, Journal of Real-Time Image Processing, 2016, pp. 1-20 (pdf)
  9. Yonggang Jin, Christos-Savvas Bouganis, “Robust multi-image based blind face hallucination”, CVPR 2015: 5252-5260 (pdf)
  10. M. Angelopoulou, Christos-Savvas Bouganis , "Vision-Based Egomotion Estimation on FPGA for Unmanned Aerial Vehicle Navigation", IEEE Transactions on Circuits and Systems for Video Technology, 24(6), 2014, pp.1070-1083. (pdf)
  11. Jianxiong Liu, Christos-Savvas Bouganis, Peter Cheung, “Kernel-based Adaptive Image Sampling”, VISAPP (1) 2014:25-32 (pdf)
  12. Jianxiong Liu, Christos-Savvas Bouganis, Peter Cheung, “Image progressive acquisition for hardware systems”, DATE 2014:1-6 (pdf)
  13. Yonggang Jin, Christos-Savvas Bouganis, "Face hallucination revisited: A joint framework", ICIP 2013, pp.981-985 (pdf)
  14. Jianxiong Liu, Christos-Savvas Bouganis, and Peter Y.K. Cheung, "Domain-specific Progressive Sampling of Face Images", IEEE Global Conference on Signal and Information Processing (GlobalSIP) 2013, pp.1021-1024 (pdf)
  15. A. Powell, Christos-Savvas Bouganis and Peter Y. K. Cheung "Early performance estimation of image compression methods on soft processors", FPL 2012, pp. 587-590 (pdf)
  16. M.Angelopoulou, C.Bouganis and P.Y.K.Cheung, "Blur Identification with Assumption Validation for Sensor-based Video Reconstruction and its Implementation on FPGA", IET Computers & Digital Techniques, Vol 5, Issue 4, 2011, pp. 271-286. (pdf)
  17. C. Cheng and C.-S. Bouganis "An FPGA-based object detector with dynamic workload balancing", FPT 2011, pp.1-4 (pdf)
  18. M. Angelopoulou and C.-S. Bouganis, “Feature Selection with Geometric Constraints for Vision-Based Unmanned Aerial Vehicle Navigation”, ICIP 2011, pp. 2357-2360, (pdf)
  19. David H. Jones, Adam Powell, C.-S. Bouganis and Peter Y.K. Cheung , “A Salient region detector for GPU using a cellular automata architecture”, ICONIP 2010, pp. 501-508, 2010 (pdf)
  20. C.-S. Bouganis, I. Pournara and Peter Y.K. Cheung, "Exploration of Heterogeneous FPGAs for Mapping Linear Projection Designs", IEEE Transactions on Very Large Scale Integration (VLSI) Systems (to appear). (pdf)
  21. Maria E. Angelopoulou, C.-S. Bouganis, Peter Y.K. Cheung and George A. Constantinides, "Robust Real-Time Super-Resolution on FPGA and an Application to Video Enhancement", ACM Transactions on Reconfigurable Technology and Systems, Vol. 2, No. 4, Article 22, 2009. (pdf)
  22. D. Bailey and C.Bouganis, "Vision sensor with an active digital fovea", Recent Advances in Sensing Technology: LNEE 49, pp.91-111 (2009).
  23. C.-S. Bouganis, S.-B. Park, G.A. Constantinides and P.Y.K. Cheung, "Synthesis and Optimization of 2D Filter Designs for Heterogeneous FPGAs", ACM Transactions on Reconfigurable Technology and Systems, Vol. 1, No. 4, Article 24, 2009. (pdf)
  24. M.Angelopoulou, C.Bouganis and P.Y.K.Cheung, "A sensor-based approach to linear blur identification for real-time video enhancement", IEEE International Conference on Image Processing, pp. 141-144, 2009 (pdf).
  25. D. Bailey and C.Bouganis, "Implementation of a Foveal Vision Mapping", Proc. IEEE International Conference on Field Programmable Technology, pp. 22-29, 2009 (pdf).
  26. D. Bailey and C.-S. Bouganis, "Tracking Performance of a Foveated Vision System", 4th International Conference on Autonomous Robots and Agents, pp.414-419, 2008 (pdf).
  27. D. Bailey and C.-S. Bouganis, "Reconfigurable Foveated Active Vision System", 3rd International Conference on Sensing Technology, pp.162-167, 2008 (pdf).
  28. M. Angelopoulou, C.-S. Bouganis and P.Y.K. Cheung, "Video Enhancement On An Adaptive Image Sensor", in Proc. International Conference on Image Processing, San Diego, California, USA, pp.681-684, 2008 (pdf).
  29. O. Bowen and C.-S. Bouganis, "Real-Time Image Super-Resolution Usign An FPGA", Proc. IEEE International Conference on Field Programmable Logic and Applications, pp.89-94, 2008 (pdf).
  30. M. Angelopoulou, C.-S. Bouganis, P.Y.K. Cheung and G.A. Constantinides, "FPGA-based Real-time Super-Resolution on an Adaptive Image Sensor", Proc. Applied Reconfigurable Computing, pp.125-136, 2008 (pdf).
  31. C.-S. Bouganis, I. Pournara and P.Y.K. Cheung, "Efficient Mapping of Dimensionality Reduction Designs onto Heterogeneous FPGAs", Proc. IEEE Symposium on Field-Programmable Custom Computing Machines, pp.141-150 (2007) (pdf).
  32. S.A. Fahmy, C.-S. Bouganis, P.Y.K. Cheung and W. Luk, "Real-time hardware acceleration of the trace transform", Journal of Real-Time Image Processing 2 (4), pp.235-248, 2007. (pdf)
  33. Christos Bouganis and Mike Brookes, "Statistical Multiple Light Source Detection", IET Computer Vision 1 (2), pp.79-91, 2007. (pdf)
  34. C.-S. Bouganis, I. Pournara and P.Y.K. Cheung, "A Statistical Framework for Dimensionality Reduction Implementation in FPGAs", IEEE International Conference on Field Programmable Technology, 2006 (pdf).
  35. C.-S. Bouganis, P.Y.K. Cheung and L. Zhaoping, "FPGA-Accelerated Pre-attentive Segmentation in Primary Visual Cortex", in Proc. IEEE International Conference on Field Programmable Logic and Applications, Madrid, August 2006 (pdf).
  36. S. Fahmy, C.-S. Bouganis, P.Y.K. Cheung and W. Luk, "Efficient Real-time FPGA Implementation of the Trace Transform", in Proc. IEEE International Conference on Field Programmable Logic and Applications, Madrid, August, 2006 (pdf).
  37. Y. Liu, C-S. Bouganis, P.Y.K. Cheung, "Spatiotemporal Saliency Framework", in Proc. International Conference on Image Processing, Atlanta, GA, 2006 (pdf).
  38. C.-S. Bouganis, G.A. Constantinides and P.Y.K. Cheung, "A Novel 2D Filter Design Methodology For Heterogeneous Devices", in Proc. IEEE Symposium on Field-Programmable Custom Computing Machines, Napa, CA, pp. 13-22, 2005 (pdf).
  39. C.-S. Bouganis, P.Y.K. Cheung and G.A. Constantinides, "Heterogeneity Exploration for Multiple 2D Filter Designs", in Proc. IEEE International Conference on Field Programmable Logic and Applications, Tampere, Finland, pp. 263-268, 2005 (pdf).
  40. C.-S. Bouganis, G.A. Constantinides and P.Y.K. Cheung, "A Novel 2D Filter Design Methodology", in Proc. IEEE International Symposium on Circuits and Systems, Vol. 1, pp. 532-535, Kobe, Japan, 2005 (pdf).
  41. C.-S. Bouganis, P.Y.K. Cheung, J. Ng and A. Bharath, "A Steerable Complex Wavelet Construction and its implementation on FPGA", in Proc. International Conference on Field Programmable Logic and Applications, pp. 394-403, Antwerp, Belgium, 2004 (pdf).
  42. C.-S. Bouganis and M. Brookes, "Class-based Multiple Light Detection: An Application to Faces", in Proc. British Machine Vision Conference, Vol. 1, pp. 113-122, Norwich, U.K. 2003 (pdf).
  43. C.-S. Bouganis and M. Brookes, "Multiple Light Source Detection", IEEE Transactions on Pattern Analysis and Machine Intelligence, Vol. 26 (4), pp. 509-514, 2004. (pdf)
Statistical Inference
  1. Sina Boroumand, Christos-Savvas Bouganis, George A. Constantinides, "MIDAS: Mutual Information Driven Approximate Synthesis", IEEE Computer Society Annual Symposium on VLSI (ISVLSI), 2022 (pdf)
  2. Grigorios Mingas, Leonardo Bottolo, C.-S. Bouganis, “Particle MCMC algorithms and architectures for accelerating inference in state-space models”. Int. J. Approx. Reasoning 83: 413-433 (2017) (pdf)
  3. Shuanglong Liu, C.-S. Bouganis, “Communication-Aware MCMC Method for Big Data Applications on FPGAs”, FCCM 2017:9-16 (pdf)
  4. Grigorios Mingas and C.-S. Bouganis "Population-based MCMC on multi-core CPUs, GPUs and FPGAs", IEEE Transactions on Computers, 2015, Vol: 65, Issue: 4 (pdf)
  5. Shuanglong Liu, Grigorios Mingas, Christos Bouganis, “An Exact MCMC Accelerator Under Custom Precision Regimes”, FPT 2015, pp. 120-127 (pdf)
  6. Shuanglong Liu, Grigorios Mingas, Christos Bouganis, “Parallel resampling for particle filters on FPGAs”, FPT 2014:191-198 (pdf)
  7. Grigorios Mingas, Farhan Rahman, C.-S. Bouganis, "On Optimizing the Arithmetic Precision of MCMC Algorithms", FCCM 2013, pp. 181-188 (pdf)
  8. G. Mingas and C.-S. Bouganis "A Custom Precision Based Architecture for Accelerating Parallel Tempering MCMC on FPGAs Without Introducing Sampling Error", FCCM 2012, pp. 153-156 (pdf)
  9. G. Mingas and C.-S. Bouganis "Parallel Tempering MCMC Acceleration Using Reconfigurable Hardware", ARC 2012, pp. 227-238 (pdf)
  10. X. Tian and C.-S. Bouganis, “A Run-Time Adaptive FPGA Architecture for Monte Carlo Simulations”, FPL 2011, pp. 116-122, 2011 (pdf)
  11. C. Saiprasert, C.-S. Bouganis and G.A. Constantinides, “Mapping Multiple Multivariate Gaussian Random Number Generators on an FPGA”, FPL, pp. 89-94, 2010 (pdf)
  12. C. Saiprasert, C.-S. Bouganis and G.A. Constantinides, “Design of a Financial Application Driven Multivariate Gaussian Random Number Generator for an FPGA”, ARC, pp. 182-193, 2010 (pdf)
  13. C. Saiprasert, C.Bouganis and G.A.Constantinides, "An Optimized Hardware Architecture of a Multivariate Gaussian Random Number Generator", ACM Transactions on Reconfigurable Technology and Systems, Volume 4 Issue 1, December 2010, Article No. 2. (pdf)
  14. C. Saiprasert, C.-S. Bouganis and G.A. Constantinides, "Word-length Optimization and Error Analysis of a Multivariate Gaussian Random Number Generator", Proc. Applied Reconfigurable Computing, pp. 231-242, 2009 (pdf).
  15. C. Saiprasert, C.-S. Bouganis and G.A. Constantinides, "Reconfigurable Multivariate Gaussian Random Number Generator with Controllable Resources", Proc Applied Reconfigurable Computing, pp.233-244, 2008 (pdf).
Computing with Unreliable HW
  1. Rui Policarpo Duarte, C.-S. Bouganis, “ARC 2014: Over-Clocking KLT Designs on FPGAs under Process, Voltage, and Temperature Variation”, TRETS 9(1):7 (2015) (pdf)
  2. Rui Policarpo Duarte, C.-S. Bouganis, "Zero-latency datapath error correction framework for over-clocking DSP applications on FPGAs”, ReConFig 2014:1-7 (pdf)
  3. Rui Policarpo Duarte, C.-S. Bouganis, "A Unified Framework for Over-Clocking Linear Projections on FPGAs under PVT Variation”, ARC 2014:49-60 (pdf)
  4. Rui Policarpo Duarte, C.-S. Bouganis, "Over-clocking of Linear Projections Designs through Device Specific Optimisations”, IPDPS Workshops 2014: 189-198 (pdf)
  5. Rui Policarpo Duarte, C.-S. Bouganis, "Pushing the performance boundary of linear projection designs through device specific optimisations”, (abstract),  FPGA 2014:245
  6. Ioannis Sourdis, Christos Strydis, A. Armato, Christos-Savvas Bouganis, Babak Falsafi, Georgi Nedeltchev Gaydadjiev, Sebastian Isaza, Alirad Malek, R. Mariani, Samuel N. Pagliarini, Dionisios N. Pnevmatikatos, Dhiraj K. Pradhan, Gerard K. Rauwerda, Robert M. Seepers, Rishad Ahmed Shafik, Georgios Smaragdos, Dimitris Theodoropoulos, Stavros Tzilis, Michalis Vavouras:”DeSyRe: On-Demand Adaptive and Reconfigurable Fault-Tolerant SoCs”, ARC 2014: 312-317
  7. Rui Policarpo Duarte, C.-S. Bouganis, "High-level linear projection circuit design optimization framework for FPGAs under over-clocking", FPL 2012, pp. 723-726 (pdf)
  8. Ioannis Sourdis, Christos Strydis, C.-S. Bouganis, Babak Falsafi, Georgi Nedeltchev Gaydadjiev, Alirad Malek, R. Mariani, Dionisios N. Pnevmatikatos, D. K. Pradhan, Gerard K. Rauwerda, Kim Sunesen, Stavros Tzilis, "The DeSyRe Project: On-Demand System Reliability", DSD 2012, pp. 335-342 (pdf)
Misc
  1. Neil Scicluna, C. Bouganis, “ARC 2014: A Multidimensional FPGA-Based Parallel DBSCAN Architecture”, TRETS 9(1):2, 2015 (pdf)
  2. Stylianos I. Venieris, Grigorios Mingas, Christos Bouganis, “Towards heterogeneous solvers for large-scale linear systems”, FPL 2015:1-8 (pdf)
  3. Powell, C. Bouganis , P. Cheung, "High-level power and performance estimation of FPGA-based soft processors and its application to design space exploration", Journal of Systems Architecture - Embedded Systems Design, Vol. 59, pp. 1144-1156 (pdf)
  4. Neil Scicluna, C. Bouganis, “FPGA-Based Parallel DBSCAN Architecture”, ARC 2014:1-12 (pdf)
  5. Y. Liu, C.-S. Bouganis and Peter Y.K. Cheung, "Hardware architectures for eigenvalue computation of real symmetric matrices", IET Computers & Digital Techniques, Vol. 3, Issue 1, pp. 72-84, 2009. (pdf)
  6. David H. Jones, Adam Powell, C.-S. Bouganis and Peter Y.K. Cheung, “GPU versus FPGA for High Productivity Computing”, FPL, pp. 119-124, 2010 (pdf).
  7. Y. Liu, C.-S. Bouganis and P.Y.K. Cheung, "Efficient Mapping of a Kalman Filter into FPGA Using Tayor Expansion", Proc. IEEE International Conference on Field Programmable Logic and Applications, (2007) (pdf).
  8. S. Bayliss, C.-S. Bouganis, and G.A. Constantinides, "An FPGA Implementation of the Simplex Algorithm", IEEE International Conference on Field Programmable Technology, 2006 (pdf).
  9. Y. Liu, C.-S. Bouganis, P.Y.K. Cheung, P.H.W. Leong and S.J. Motley, "Hardware Efficient Architectures for Eigenvalue Computation", in Proc. Design, automation and test in Europe, Munich, Germany, pp. 953-958, 2006 (pdf).
  10. I. Pournara, C.-S. Bouganis and G.A. Constantinides, "FPGA-Accelerated Reconstruction of Gene Regulatory Networks", in Proc. IEEE International Conference on Field Programmable Logic and Applications, Tampere, Finland, pp. 323-328, 2005 (pdf).
  11. C.-S. Bouganis, D. Koukopoulos and D. Kalles, "A real-time auction system over the WWW'', in Proc. Conference on Communication Networks and Distributed Systems Modelling and Simulation, San Francisco, CA, 1999 (pdf).

FPL 2024

May 2024
Our paper on Hardware-aware Sparsity Search (HASS) is accepted to FPL!

FCCM 2024

May 2024
Our team member Petros has presented our work "SMOF" in Orlando. Check the presentation now!

FCCM 2024

Mar 2024
Our paper "SMOF: Streaming Modern CNNs on FPGAs with Smart Off-Chip" is accepted to FCMM. Congrats!

AMD visit

Mar 2024
Our team presented our latest work on the acceleration of AI models on FPGAs in AMD San Jose.

SpatialML workshop

Mar 2024
Our recent work on fpgaConvNet was presented in the SpatialML workshop co-located with ISFPGA’24

cornell tech visit

Feb 2024
Our team member Zhewen Yu shared his work on Accelerator Design Space Exploration in Cornell Tech

Dr Ben Chua

Jan 2024
Congratulations on our team member Ben Chua for passing his PhD viva!

DATE 2024

Nov 2023
Our work on Hardware accelerated Gaussian Belief Propagation in SLAM problems is accepted to DATE

DATE 2024

Nov 2023
Our work, Automate Weights Streaming in Layer-wise Pipelined DNN Accelerators, accepted to DATE2024

FPT 2023

Oct 2023
Our work SATAY: Streaming Architecture Toolflow for Accelerating YOLO Models is accepted to FPT2023

ICCV 2023

Jul 2023
Our work on Window-Based Early-Exit Cascades for Uncertainty Estimation is accepted to ICCV2023

FPL 2023

May 2023
Our paper on Exploiting CNN Post-Activation Sparsity in Streaming Architectures is accepted to FPL

FPL 2023

May 2023
Our paper on Efficient Accelerator with Layer-Specific Tensor Decomposition is accepted to FPL

FPL 2023

May 2023
Our paper on a toolflow for throughput oriented HAR acceleration on FPGAs is accepted to FPL

ASAP 2023

May 2023
Our work on optimization and mapping of X3D HAR model on FPGAs is accepted to ASAP

FCCM 2023

Apr 2023
Our work on a latency-oriented 3D-CNN accelerator toolflow will show in this year's FCCM

Best Paper Nomination

Apr 2023
Our work on designing efficient FPGA-based accelerators for Early-Exit CNNs accepted to FCCM23

Best Paper Award

Dec 2022
Our work on Selective Classification with OOD data received ACCV Saburo Tsuji Best Paper Award!

ACCV 2022

Sep 2022
Our work on Selective Classification with OOD Data will show in this year's ACCV

ECCV 2022

Sep 2022
Our work On the Usefulness of Deep Ensemble Diversity for OOD Detection is accepted at ECCV workshop

WACV 2023

Sep 2022
Our paper SVD-NAS Coupling Low-Rank Approximation and Neural Architecture Search is accepted to WACV

NANDA 2022

Sep 2022
Prof. Bouganis gave an invited talk on CNN acceleration in the NANDA workshop

RCML 2022

Sep 2022
Prof. Bouganis co-organised the 6th Workshop on Reconfigurable Computing for ML (RCML), at FPL 2022

ASP-DAC 2021

DEC 2020
Our paper on Differential Encoding of Featuremaps for CNN Accelerators has been accepted to ASP-DAC.

ARC 2020

OCT 2020
Our paper on "A Parameterisable FPGA-Tailored Architecture for YOLOv3-Tiny" has been accepted to ARC

EMDL Keynote

SEP 2020
Dr. Bouganis was invited to give a keynote in EMDL 2020 workshop, co-located with Mobicom 2020.

Next Platform Interview

JUL 2020
Watch Dr. Stylianos Venieris' interview on "The next platform" discussing our collaborative work.

SAIC Talk

JUL 2020
Dr. Bouganis was invited to give a presentation of our recent work to Samsung AI Center, Cambridge.

ICML 2020

JUN 2020
Our paper on Multi-Precision Policy Enforced Training (MuPPET) has been accepted to ICML2020.

Dr. Nur Ahmadi

JUN 2020
Congratulations to our group member Nur Ahmadi for passing his PhD Viva

FPL 2020

MAY 2020
Our paper on Caffe Barista: Brewing Caffe with FPGAs in the Training Loop has been accepted to FPL20

Dr. Manolis Vasileiadis

MAY 2020
Congratulations to our group member Manolis Vasileiadis for passing his PhD Viva

PhD studentship

MAR 2020
Exciting opportunity to join our group and work closely with Arm, on probabilistic ML acceleration.

HiPEAC WRC 2020

JAN 2020
Dr. Bouganis co-organised the 14th HiPEAC Workshop on Reconfigurable Computing.

IEEE RAS Conf. 2020

JAN 2020
Our IROS19 work on UAV-based vehicle detection awarded the 3rd place in the IEEE UK&I RAS Conference

DATE 2020

NOV 2019
Our paper on "A Throughput-Latency Co-Optimised Cascade of CNN Classifiers" is accepted at DATE2020.

FPT 2019

NOV 2019
Our paper on “Power-Aware FPGA Mapping of CNNs for On-Device Inference” is accepted at FPT2019.

BMVC 2019

OCT 2019
Our paper on 3D-CNNs for Human Pose Estimation on low-power devices is accepted at BMVC 2019 (pdf).

Welcome Alexander

OCT 2019
We are pleased to welcome Alexander Montgomerie as a PhD Student in iDSL.

RCML19

SEPT 2019
Dr. Bouganis co-organised the 3rd Workshop on Reconfigurable Computing for ML (RCML), in FPL 2019.

ISVLSI 2019 Slides

JULY 2019
Dr. Bouganis presented an overview of our recent work at ISVLSI19 (slides)

Dr. Konstantinos Boikos

JUL 2019
Congratulations to our group member Konstantinos Boikos for passing his PhD Viva

Exhibition Road Festival 2019

JUNE 2019
iDSL participates on the Exhibition Road Festival. Come and see our drones in action in the Arena.

IROS 2019

JUNE 2019
Our paper on Informed Region Selection for UAV-based Vehicle Detection is accepted at IROS2019.

ISVLSI 2019

JUNE 2019
Our invited paper on Efficient Deployment of DNNs on Autonomous Systems will be presented in ISVLSI.

SpatialML Centre

MAY 2019
Our International Centre for Spatial Computational Learning has been announced.

FPL 2019

MAR 2019
Dr.Bouganis with be co-chairing the Program-Committee of FPL 2019, held in Barcelona.

ARC 2019

FEB 2019
Our paper on "A Scalable FPGA-based Architecture for Depth Estimation in SLAM" got accepted in ARC19

Welcome Mario

FEB 2019
We are pleased to welcome Mário Ferreira as a Research Assistant in iDSL.

Future of Drones Workshop

OCT 2018
Dr.Bouganis presented our work in the Future of Drones & UAVs workshop at Austrian Trade Commission

IROS 2018 Talk

OCT 2018
Watch our IROS2018 spolight talk on Self-Supervised CNN-based Autonomous UAV Navigation.

Dr. Stylianos I. Venieris

OCT 2018
Congratulations to our group member Stylianos Venieris for passing his PhD Viva

NG-HPC 2018 Presentation

SEPT 2018
Dr. Bouganis presented our work on fpgaConvNet toolflow in NG-HPC 2018 (slides)

RCML18 Presentation

SEPT 2018
Dr. Bouganis presented our work "Deploying Deep Neural Networks on the Embedded Space" in RCML18

Job Opening

AUG 2018
iDSL is recruiting for a new RA position in the area of Machine Learning and FPGA co-design (click)

RCML'18

JULY 2018
Call for papers: 2nd Workshop on Reconfigurable Computing for Machine Learning in FPL 2018

IROS 2018

JUNE 2018
Our paper on Self-Supervised CNN-based Autonomous UAV Navigation has been accepted at IROS 2018.

TNNLS 2018

JUNE 2018
Our TNNLS paper on fpgaConvNet is now available online (link).

MobiSys18 Workshop

JUNE 2018
We are happy to present our work on Deploying Deep Learning Models in Embedded Devices, at EMDL18.

CNN-to-FPGA Benchmark

MAY 2018
Our CNN-to-FPGA Benchmark Suite, introduced in our CSUR paper, can be found in our webpage (Click)

FPL 2018

MAY 2018
Our paper "CascadeCNN: Pushing the Performance Limits of Quantisation in CNNs" got accepted at FPL18

FPL 2018

MAY 2018
Our paper "f-CNNx: A Toolflow for Mapping Multiple CNNs on FPGAs" has been accepted at FPL 2018.

ARC 2018

APR 2018
Our ARC 2018 paper on FPGA-based LSTMs was nominated for best paper award. (Read pre-print)

Imperial Festival 2018

APR 2018
Our drones were flying in the Robotics Zone of this year's Imperial Festival.

Dr.Bouganis Promotion

APR 2018
We are delighted to announce that our director, Dr.Bouganis, has been promoted to a Reader.

CSUR 2018

MAR 2018 (In Press)
CNN-to-FPGA toolflows Survey and Future Directions paper accepted by ACM Computing Surveys

SysML 2018

JAN 2018
Our latest work on Computational ML is accepted to be presented in the inaugural SysML conference.

WRC'18 Talk

JAN 2018
Dr.Bouganis gave a talk on "Toolflows for mapping CNNs into FPGAs" in HiPEAC WRC 2018. (slides)

WRC at HiPEAC 2018

JAN 2018
Dr.Bouganis will be co-organising the 12th Workshop on Reconfigurable Computing, at HiPEAC 2018.

ARC 2018

JAN 2018
New paper: "Approximate FPGA-based LSTMs under Computation Time Constraints” on ARC2018.

NIPS 2017

NOV 2017
fpgaConvNet will be presented on NIPS2017 workshop on "ML on the Phone and Other Consumer Devices"

DATE 2018

NOV 2017
Special Session on Next Generation Processors and Architectures for Deep Learning has been accepted

RCDL'17

SEPT 2017
1st FPL Workshop on Reconfigurable Computing for Deep Learning co-organised by Dr. Bouganis

IROS 2017

SEPT 2017
A very successful and machine learning oriented IROS conference came to an end.

Dr. Shuanglong Liu

JULY 2017
Congratulations to our group member Shuanglong Liu for passing his PhD Viva

FPL 2017

JUNE 2017
Two papers from our group are accepted on FPL 2017.

Dr. Michail Vavouras

JULY 2017
Congratulations to our group member Michail Vavouras for passing his PhD Viva

UROP Students 2017

JUNE 2017
Our group is excited to welcome 2 UROP students for this summer.